On July 27, 2026, TSMC, the global semiconductor foundry leader, announced at its latest earnings call that its advanced packaging capacity (especially CoWoS and InFO technologies) will double year-on-year in the second half of 2026 to meet urgent demand from NVIDIA, AMD and cloud AI chip clients. This news quickly ignited Asia's semiconductor sector; on the SGX mainboard, stocks related to packaging test equipment and materials such as UMS Holdings and AEM Holdings rose over 3% in early trading today.
Advanced Packaging: The Core Arena Under AI Computing Power Bottleneck
As AI model parameters exceed trillions, traditional chip process shrinkage approaches physical limits, making advanced packaging key to system performance. TSMC's CoWoS (Chip-on-Wafer-on-Substrate) technology integrates multiple GPUs with high-bandwidth memory (HBM) on one substrate, greatly shortening data paths. According to TSMC, CoWoS capacity has been fully loaded for nine consecutive quarters since 2024, and is expected to expand another 50% by 2027.
"Advanced packaging is no longer a supporting role but a decisive factor in AI chip performance," noted a DBS semiconductor analyst. "Previously, the market only focused on lithography or etching, but packaging bottlenecks are affecting graphics card delivery cycles. NVIDIA has even stationed engineers at OSATs to secure capacity." This view is confirmed: ASE announced on July 26 that its new Kaohsiung plant started production three months early, with all capacity dedicated to CoWoS interposer manufacturing; KYEC also expanded tester lines to meet HBM3E final test demand.
Global OSAT Landscape Reconfigured: Asian Supply Chain Advantage
Mainland China OSATs are also accelerating, but constrained by export controls on advanced packaging equipment, they remain mainly mid-to-low end in the near term. In contrast, Taiwan, Singapore and Malaysia have more competitive packaging capacity. Singapore, a key semiconductor packaging hub, hosts large bases like UTAC and JCET (Changjiang Electronics Technology), and the government has launched a "Semiconductor Packaging and Testing Promotion Plan" offering tax incentives to attract CoWoS-related production lines.
On investment targets, SGX mainboard-listed UMS Holdings (UMS.SI), which supplies critical components for wafer fabs, has received orders from TSMC for vacuum chambers used in advanced packaging equipment through its Taiwan subsidiary, with order value up 40% year-on-year. Another firm, AEM Holdings (AEM.SI), provides system-level testing solutions; its latest SLT (System Level Test) platform has been adopted by multiple HBM makers. Both companies are expected to post record quarterly revenues.
Memory and Packaging Synchronize: HBM3E Shortage and Price Hikes
Tightening alongside packaging capacity is high-bandwidth memory HBM. Samsung Electronics announced on July 25 that its 12-layer stack HBM3E yield has surpassed 80%, yet the entire 2026 capacity is fully booked by NVIDIA, Google and AMD. Micron also plans to quadruple HBM capacity by 2027. The HBM supply crunch is directly driving demand for memory interface chips and test equipment. AAC Tech on the SGX mainboard, known for acoustic components, also benefits from HBM testing demand through its probe card subsidiary.
"Memory and packaging form a positive feedback loop," said a Bloomberg Intelligence analyst. "HBM requires advanced packaging for high bandwidth, and advanced packaging needs HBM for data throughput. This coupling makes the two sectors highly overlapping in investment logic. Investors can look at companies involved in both areas, such as Teradyne (not listed on SGX, but its suppliers partly in Asia)."
3D Packaging Mass Production Ahead: Technology Inflection Point in 2027
Looking further ahead, TSMC has disclosed that its 3D SoIC (System-on-Integrated-Chips) packaging technology will enter mass production in 2027, enabling vertical stacking of CPU, GPU, HBM and I/O chips, boosting performance by another 30%. Intel and Samsung are developing similar solutions, but TSMC remains ahead thanks to extensive CoWoS experience. Once 3D packaging becomes widespread, upstream materials and equipment will see a new explosion, including TSV (through-silicon via) etchers, plating chemicals, and hybrid bonding tools for chip bonding.
SGX-listed semiconductor equipment stocks such as Micro-Mechanics Holdings (MMH.SI) and Midas Holdings (MIDAS.SI) have begun building relevant capabilities. MMH specializes in high-precision molds and cutting blades; 3D packaging demands higher wafer dicing accuracy, likely boosting shipments of its high-end products.
Risk Warnings and Investment Strategies
Despite the optimistic outlook, investors should note the following risks: First, advanced packaging equipment requires huge investments; 35% of TSMC's 2026 capex is allocated to back-end packaging. If AI chip demand growth slows, capacity utilization could drop quickly. Second, geopolitical risks cannot be ignored — US restrictions on China's semiconductor technology have extended to advanced packaging equipment, potentially delaying export license approvals for some equipment makers. Third, earnings season is approaching; some OSAT companies' Q2 gross margins may be pressured by increased depreciation.
In terms of operational suggestions, SGX mainboard investors can adopt a "barbell strategy": on one end, allocate core TSMC supply chain stocks such as UMS Holdings and AEM Holdings; on the other end, position in memory-related equipment makers benefiting from long-term HBM growth. In the short term, watch for Q2 revenue guidance in early August; if TSMC raises its full-year CoWoS capacity forecast again (highly probable), related stocks may start a new rally.
(Disclaimer: The above analysis is for reference only and does not constitute investment advice. Stock markets carry risks; invest with caution.)
